Publications
Notable Publications
(A full publication list is attached after the notable publication list below)
(VLSI'22) i-FlatCam: A 253 FPS, 91.49 μJ/Frame Ultra-Compact Intelligent Lensless Camera System for Real-Time and Efficient Eye Tracking in VR/AR
Y. Zhao, Z. Li, H. You, Y. Fu, Y. Zhang, C. Li, V. Boominathan, A. Veeraraghavan, and Y. Lin
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI), 2022
(ISCA'22) EyeCoD: Eye Tracking System Acceleration via FlatCam-Based Algorithm and Accelerator Co-Design
H. You*, C. Wan*, Y. Zhao*, Z. Yu*, Y. Fu, C. Li, S. Zhang, S. Wu, J. Yuan, Y. Zhang, V. Boominathan, A. Veeraraghavan, Z. Li, and Y. Lin (*Co-first author)
49th IEEE/ACM International Symposium on Computer Architecture (ISCA), 2022
Selected as IEEE Micro Top Picks in Computer Architecture Conferences in 2023
(ICASSP'20) DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architectures
Y. Zhao, C. Li, Y. Wang, P. Xu, Y. Zhang, and Y. Lin
45th IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2020
Full Publication List
First-Authored Publications:
Instant-NeRF: Instant On-Device Neural Radiance Field Training via Algorithm-Accelerator Co-Designed Near-Memory Processing
Y. Zhao, S. Wu, J. Zhang, S. Li, C. Li, and Y. Lin
60th ACM/IEEE Design Automation Conference (DAC), 2023
DAC'23 | Paper
RT-NeRF: Real-Time On-Device Neural Radiance Fields Towards Immersive AR/VR Rendering
C. Li*, S. Li*, Y. Zhao*, W. Zhu, and Y. Lin
(*Co-first author)
41st IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2022
ICCAD'22 | Paper | Project Page
EyeCoD: Eye Tracking System Acceleration via FlatCam-Based Algorithm and Accelerator Co-Design
H. You*, C. Wan*, Y. Zhao*, Z. Yu*, Y. Fu, C. Li, S. Zhang, S. Wu, J. Yuan, Y. Zhang, V. Boominathan, A. Veeraraghavan, Z. Li, and Y. Lin
(*Co-first author)
49th IEEE/ACM International Symposium on Computer Architecture (ISCA), 2022
Selected as IEEE Micro Top Picks in Computer Architecture Conferences in 2023
i-FlatCam: A 253 FPS, 91.49 μJ/Frame Ultra-Compact Intelligent Lensless Camera System for Real-Time and Efficient Eye Tracking in VR/AR
Y. Zhao, Z. Li, H. You, Y. Fu, Y. Zhang, C. Li, V. Boominathan, A. Veeraraghavan, and Y. Lin
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI), 2022
VLSI'22 | Paper | Video | Demo | Slides
e-G2C: A 0.14-to-8.31 μJ/Inference NN-based Processor with Continuous On-chip Adaptation for Anomaly Detection and ECG Conversion from EGM
Y. Zhao, Y. Zhang, Y. Fu, X. Ouyang, C. Wan, S. Wu, A. Banta, M. John, A. Post, M. Razavi, J. Cavallaro, B. Aazhang, and Y. Lin
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI), 2022
SmartDeal: Re-Modeling Deep Network Weights for Efficient Inference and Training
X. Chen*, Y. Zhao*, Y. Wang, P. Xu, H. You, C. Li, Y. Fu, Z. Wang, and Y. Lin
IEEE Transactions on Neural
Networks and Learning Systems (TNNL), 2021
(*Co-first author)
TNNL'21 | Paper
SmartExchange: Trading Higher-cost Memory Storage/Access for Lower-cost Computation
Y. Zhao*, X. Chen*, Y. Wang, C. Li, H. You, Y. Fu, Y. Xie, Z. Wang, and Y. Lin
(*Co-first author)
47th IEEE/ACM International Symposium on Computer Architecture (ISCA), 2020
ISCA'20 | Paper | Video | Slides
DNN-Chip Predictor: An Analytical Performance Predictor for DNN Accelerators with Various Dataflows and Hardware Architectures
Y. Zhao, C. Li, Y. Wang, P. Xu, Y. Zhang, and Y. Lin
45th IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP), 2020
A New MRAM-Based Process In-Memory Accelerator for Efficient Neural Network Training with Floating Point Precision
H. Wang*, Y. Zhao*, C. Li, Y. Wang, and Y. Lin
(*Co-first author)
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020
ISCAS'20 | Paper
Memory Trojan Attack on Neural Network Accelerators
Y. Zhao*, X. Hu*, S. Li, J. Ye, L. Deng, Y. Ji, J. Xu, D. Wu, and Y. Xie
(*Co-first author)
2019 Design, Automation and Test in Europe Conference and Exhibition (DATE), 2019
DATE'19 | Paper
An All-Digital Gigahertz Class-S Transmitter in a 65-nm CMOS
Y. Zhao, Y. Shen, P. Xue, Z. Ma, Z. Peng, B. Chen, and Z. Hong
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 24, no. 4, pp. 1402–1411, 2015
TVLSI'15 | Paper
Design of A Time-Interleaved Band-Pass Σ∆ Modulator for Class-S Power Amplifier
Y. Zhao, B. Y. Liu, and Z. Hong
10th IEEE International Conference on ASIC (ASICON), 2013
ASICON'13 | Paper
Collaborated Publications:
Instant-3D: Instant Neural Radiance Field Training Towards On-Device AR/VR 3D Reconstruction
S. Li, C. Li, W. Zhu, B. Yu, Y. Zhao, C. Wan, H. You, H. Shi, and Y. Lin,
50th IEEE/ACM International Symposium on Computer Architecture (ISCA), 2023
ISCA'23 | Paper
ViTCoD: Vision Transformer Acceleration via Dedicated Algorithm and Accelerator Co-Design
H. You, Z. Sun, H. Shi, Z. Yu, Y. Zhao, Y. Zhang, C. Lli, B. Li, and Y. Lin
29th IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2023
HPCA'23 | Paper
NASA: Neural Architecture Search and Acceleration for Hardware Inspired Hybrid Networks
H. Shi, H. You, Y. Zhao, Z. Wang, and Y. Lin
41st IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2022
ICCAD'22 | Paper
2-in-1 Accelerator: Enabling Random Precision Switch for Winning Both Adversarial Robustness and Efficiency
Y. Fu, Y. Zhao, Q. Yu, C. Li, and Y. Lin
54th IEEE/ACM International Symposium on Microarchitecture (MICRO), 2021
MICRO'21 | Paper
HW-NAS-Bench: Hardware-Aware Neural Architecture Search Benchmark
C. Li, Z. Yu, Y. Fu, Y. Zhang, Y. Zhao, H. You, Q. Yu, Y. Wang, C. Hao, and Y. Lin
International Conference on Learning Representations (ICLR), 2021
ICLR'21 | Paper
TIMELY: Pushing Data Movements And Interfaces In PIM Accelerators Towards Local And In Time Domain
W. Li, P. Xu, Y. Zhao, H. Li, Y. Xie, and Y. Lin
47th IEEE/ACM International Symposium on Computer Architecture (ISCA), 2020
ISCA'20 | Paper
AutoDNNchip: An Automated DNN Chip Predictor and Builder for Both FPGAs and ASICs
P. Xu, X. Zhang, C. Hao, Y. Zhao, Y. Zhang, Y. Wang, C. Li, Z. Guan, D. Chen, and Y. Lin
28th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2020
FPGA'20 | Paper
Practical Attacks on Deep Neural Networks by Memory Trojaning
X. Hu, Y. Zhao, L. Deng, L. Liang, P. Zuo, J. Ye, Y. Lin, and Y. Xie,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 40, no. 6, pp. 1230–1243, 2020
TCAD'20 | Paper
FracTrain: Fractionally Squeezing Bit Savings Both Temporally and Spatially for Efficient DNN Training
Y. Fu, H. You, Y. Zhao, Y. Wang, C. Li, K. Gopalakrishnan, Z. Wang, and Y. Lin
Advances in Neural Information Processing Systems (NeurIPS), 2020
NeruIPS'20 | Paper
E2-train: Training State-of-the-art CNNs with Over 80% Energy Savings
Y. Wang, Z. Jiang, X. Chen, P. Xu, Y. Zhao, Y. Lin, and Z. Wang
Advances in Neural Information Processing Systems (NeurIPS), 2019
NeruIPS'19 | Paper
Packet Pump: Overcoming Network Bottleneck in On-Chip Interconnects for GPGPUs
X. Cheng, Y. Zhao, H. Zhao, and Y. Xie
55th ACM/ESDA/IEEE Design Automation Conference (DAC), 2018
DAC'18 | Paper
EnergyNet: Energy-Efficient Dynamic Inference
Y. Wang, T. Nguyen, Y. Zhao, Z. Wang, Y. Lin, and R. Baraniuk
Advances in Neural Information Processing Systems (NeurIPS workshop), 2018
NeurIPS workshop'18 | Paper